This specification relates to switches, for example, switch chips.
Input/output memory management units (IOMMUs) walk page tables to translate device addresses, for translation requests and for protection in systems that run virtual machines. In some examples, IOMMUs may do partial page walk caching, e.g., a) to conserve space when limited memory is available, b) when the IOMMU responds to translation requests for a large number of devices, or both.
Peripheral Component Interconnect Express (PCIe) address translation services (ATS) allows a device to request an address translation from an IOMMU and cache the translation locally on the device, e.g., in a translation lookaside buffer (TLB). In some instances, a device's TLB might not be large enough to store all virtual address to physical address mappings the device will use.